Cohort 12 · Applications open · 17 seats
Chip dreamers.Designed.
A six-month transformation program led by Mabi Nadaf. Built for engineers who refuse to settle for non-core careers.
The Problem
You studied analog. You never designed a chip.
Most engineers who land here aren't lazy. They're stuck in a system that never taught them how the industry actually designs analog ICs — and they're being left behind as India becomes the world's chip design capital.
by 2027
for analog designers
Mission allocation
The seats won't last. Neither will this window.
The Founder
Mabi Nadaf
Founder · 10+ years in Analog IC Design
"I built GIICT because I watched too many talented engineers get stuck in embedded, layout, or testing roles — not because they weren't good enough, but because nobody ever showed them how the industry actually designs analog ICs. I made it my mission to fix that."
The Outcome
We don't claim placements.
We show them.
engineers placed in core analog roles
completion-to-offer rate
average post-program salary
The System
Four stages.
Six months.
One designer.
The GIICT Silicon Career System™ — a method, not a course.
You stop being confused.
Device physics. MOSFET behaviour. Analog fundamentals — taught the way industry uses them, not the way college teaches them.
You build recruiter-grade work.
Hands-on Cadence Virtuoso. Op-amp, current mirror, LDO, bandgap — designed, simulated, debugged.
You become tape-out aware.
PVT, Monte Carlo, DRC, LVS, parasitics, DFM — the filter that ninety percent of freshers fail.
You walk in as the top one percent.
Portfolio packaging. LinkedIn rebuild. Mock interviews. Recruiter introductions. Salary negotiation.
The Program
What you get. What you pay.
Six-month structured curriculum
Aligned to the four-stage system.
Cadence Virtuoso hands-on access
Industry-standard tool. You graduate fluent.
Six industry-grade design projects
Op-amp, LDO, bandgap, current mirror, PLL block, layout. Portfolio-ready.
Weekly 1:1 mentorship
Real designers reviewing your work. No chatbots, no TAs, no juniors.
Tape-out readiness
PVT, Monte Carlo, DRC, LVS, parasitics. The filter most courses skip.
Placement Activation Sprint
Resume rebuild, LinkedIn re-positioning, mock interviews, recruiter introductions, negotiation script.
Lifetime alumni access
Cohort + alumni network. Warm referrals, internal job leads, peer reviews.
The Decision
Chip dreamers are designed.
We just give them the system.
Cohort 12 closes in 9 days. We accept 30 engineers per cohort. Application takes 4 minutes.